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? semiconductor components industries, llc, 2013 august, 2013 ? rev. 14 1 publication order number: mc34262/d mc34262, mc33262 power factor controllers the mc34262/mc33262 are active power factor controllers specifically designed for use as a preconverter in electronic ballast and in off ? line power converter applications. these integrated circuits feature an internal startup timer for stand ? alone applications, a one quadrant multiplier for near unity power factor, zero current detector to ensure critical conduction operation, transconductance error amplifier, quickstart circuit for enhanced startup, trimmed internal bandgap reference, current sensing comparator, and a totem pole output ideally suited for driving a power mosfet. also included are protective features consisting of an overvoltage comparator to eliminate runaway output voltage due to load removal, input undervoltage lockout with hysteresis, cycle ? by ? cycle current limiting, multiplier output clamp that limits maximum peak switch current, an rs latch for single pulse metering, and a drive output high state clamp for mosfet gate protection. these devices are available in dual ? in ? line and surface mount plastic packages. features ? overvoltage comparator eliminates runaway output voltage ? internal startup timer ? one quadrant multiplier ? zero current detector ? trimmed 2% internal bandgap reference ? totem pole output with high state clamp ? undervoltage lockout with 6.0 v of hysteresis ? low startup and operating current ? supersedes functionality of sg3561 and tda4817 ? these are pb ? free and halide ? free devices figure 1. simplified block diagram voltage feedback input multiplier, latch, pwm, timer, & logic error amp multiplier undervoltage lockout 2.5v reference zero current detector 5 8 6 7 4 3 2 1 drive output gnd zero current detect input multiplier input compensation v cc current sense input overvoltage comparator + 1.08 v ref + v ref quickstart power factor controllers pin connections soic ? 8 d suffix case 751 8 1 8 1 pdip ? 8 p suffix case 626 voltage feedback input 1 2 3 4 8 7 6 5 (top view) compensation multiplier input current sense input v cc drive output gnd zero current detect input http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 17 of this data sheet. ordering information x = 3 or 4 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g = pb ? free package = pb ? free package marking diagrams mc3x262p awl yywwg 1 8 3x262 alyw 1 8
mc34262, mc33262 http://onsemi.com 2 maximum ratings rating symbol value unit total power supply and zener current (i cc + i z ) 30 ma output current, source or sink (note 1) i o 500 ma current sense, multiplier, and voltage feedback inputs v in ? 1.0 to +10 v zero current detect input high state forward current low state reverse current i in 50 ? 10 ma power dissipation and thermal characteristics p suffix, plastic package, case 626 maximum power dissipation @ t a = 70 c thermal resistance, junction ? to ? air d suffix, plastic package, case 751 maximum power dissipation @ t a = 70 c thermal resistance, junction ? to ? air p d r ja p d r ja 800 100 450 178 mw c/w mw c/w operating junction temperature t j +150 c operating ambient temperature (note 4) mc34262 mc33262 t a 0 to + 85 ? 40 to +105 c storage t emperature t stg ? 65 to +150 c esd protection (note 2) human body model esd machine model esd charged device model esd hbm mm cdm 2000 200 2000 v v v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. maximum package power dissipation limits must be observed. 2. esd protection per jedec jesd22 ? a114 ? f for hbm, per jedec jesd22 ? a115 ? a for mm, and per jedec jesd22 ? c101d for cdm. this device contains latchup protection and exceeds 100 ma per jedec standard jesd78. electrical characteristics (v cc = 12 v (note 3), for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies (note 4), unless otherwise noted.) characteristic symbol min typ max unit error amplifier voltage feedback input threshold t a = 25 c t a = t low to t high (v cc = 12 v to 28 v) v fb 2.465 2.44 2.5 ? 2.535 2.54 v line regulation (v cc = 12 v to 28 v, t a = 25 c) reg line ? 1.0 10 mv input bias current (v fb = 0 v) i ib ? ? 0.1 ? 0.5 a transconductance (t a = 25 c) g m 80 100 130 mho output current source (v fb = 2.3 v) sink (v fb = 2.7 v) i o ? ? 10 10 ? ? a output voltage swing high state (v fb = 2.3 v) low state (v fb = 2.7 v) v oh(ea) v ol(ea) 5.8 ? 6.4 1.7 ? 2.4 v overvoltage comparator voltage feedback input threshold v fb(ov) 1.065 v fb 1.08 v fb 1.095 v fb v multiplier input bias current, pin 3 (v fb = 0 v) i ib ? ? 0.1 ? 0.5 a input threshold, pin 2 v th(m) 1.05 v ol(ea) 1.2 v ol(ea) ? v 3. adjust v cc above the startup threshold before setting to 12 v. 4. t low =0 c for mc34262 t high = +85 c for mc34262 = ? 40 c for mc33262 = +105 c for mc33262.
mc34262, mc33262 http://onsemi.com 3 electrical characteristics (continued) (v cc = 12 v (note 6), for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies (note 7), unless otherwise noted.) characteristic symbol min typ max unit multiplier dynamic input voltage range multiplier input (pin 3) compensation (pin 2) v pin 3 v pin 2 0 to 2.5 v th(m) to (v th(m) + 1.0) 0 to 3.5 v th(m) to (v th(m) + 1.5) ? ? v multiplier gain (v pin 3 = 0.5 v, v pin 2 = v th(m) + 1.0 v) (note 8) k 0.43 0.65 0.87 1/v zero current detector input threshold voltage (v in increasing) v th 1.33 1.6 1.87 v hysteresis (v in decreasing) v h 100 200 300 mv input clamp v oltage high state (i det = + 3.0 ma) low state (i det = ? 3.0 ma) v ih v il 6.1 0.3 6.7 0.7 ? 1.0 v current sense comparator input bias current (v pin 4 = 0 v) i ib ? ? 0.15 ? 1.0 a input offset voltage (v pin 2 = 1.1 v, v pin 3 = 0 v) v io ? 9.0 25 mv maximum current sense input threshold (note 9) v th(max) 1.3 1.5 1.8 v delay to output t phl(in/out) ? 200 400 ns drive output output voltage (v cc = 12 v) low state (i sink = 20 ma) low state (i sink = 200 ma) high state (i source = 20 ma) high state (i source = 200 ma) v ol v oh ? ? 9.8 7.8 0.3 2.4 10.3 8.4 0.8 3.3 ? ? v output voltage (v cc = 30 v) high state (i source = 20 ma, c l = 15 pf) v o(max) 14 16 18 v output voltage rise time (c l = 1.0 nf) t r ? 50 120 ns output voltage fall time (c l = 1.0 nf) t f ? 50 120 ns output voltage with uvlo activated (v cc = 7.0 v, i sink = 1.0 ma) v o(uvlo) ? 0.1 0.5 v restart timer restart time delay t dly 200 620 ? s undervoltage lockout startup threshold (v cc increasing) v th(on) 11.5 13 14.5 v minimum operating voltage after turn ? on (v cc decreasing) v shutdown 7.0 8.0 9.0 v hysteresis v h 3.8 5.0 6.2 v total device power supply current startup (v cc = 7.0 v) operating dynamic operating (50 khz, c l = 1.0 nf) i cc ? ? ? 0.25 6.5 9.0 0.4 12 20 ma power supply zener voltage (i cc = 25 ma) v z 30 36 ? v 5. maximum package power dissipation limits must be observed. 6. adjust v cc above the startup threshold before setting to 12 v. 7. t low =0 c for mc34262 t high = +85 c for mc34262 = ? 40 c for mc33262 = +105 c for mc33262. 8. k pin 4 threshold v pin 3 (v pin2 v th(m) ) 9. this parameter is measured with v fb = 0 v, and v pin 3 = 3.0 v.
mc34262, mc33262 http://onsemi.com 4 1.4 -0.2 3.8 0.6 2.2 3.0 v pin 2 = 2.0 v v cc = 12 v t a = 25 c v m , multiplier pin 3 input voltage (v) figure 2. current sense input threshold versus multiplier input -0.12 v m , multiplier pin 3 input voltage (v) -0.06 0.06 0.12 0.18 0.24 0 v cc = 12 v t a = 25 c figure 3. current sense input threshold versus multiplier input, expanded view 0.2 0 1.6 0.08 1.4 1.2 1.0 0.8 0.6 0.4 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 v pin 2 = 3.75 v v pin 2 = 2.25 v v pin 2 = 2.5 v v pin 2 = 2.75 v v pin 2 = 3.0 v v pin 2 = 2.25 v v pin 2 = 2.5 v v pin 2 = 3.75 v v pin 2 = 2.75 v v pin 2 = 2.0 v v pin 2 = 3.25 v v pin 2 = 3.0 v v pin 2 = 3.25 v v pin 2 = 3.5 v v pin 2 = 3.5 v figure 4. voltage feedback input threshold change versus temperature figure 5. overvoltage comparator input threshold versus temperature v cc = 12 v -55 t a , ambient temperature ( c) -25 0 25 50 75 100 figure 6. error amp t ransconductance and phase versus frequency -55 t a , ambient temperature ( c) -25 0 25 50 75 100 125 v cc = 12 v pins 1 to 2 figure 7. error amp t ransient response 125 3.0 k 10 k 30 k 100 k 300 k 1.0 m 3.0 m 0 90 60 30 120 150 180 f, frequency (hz) v cc = 12 v v o = 2.5 v to 3.5 v r l = 100 k to 3.0 v c l = 2.0 pf t a = 25 c 5.0 s/div transconductance phase 0 v/div v cc = 12 v r l = 100 k c l = 2.0 pf t a = 25 c 110 109 108 106 107 4.0 -4.0 -12 -16 0 -8.0 120 100 80 60 40 20 0 4.00 v 3.25 v 2.50 v v fb , voltage feedback threshold change (mv) v cs , current sense pin 4 threshold (v) v cs , current sense pin 4 threshold (v) v fb(ov) , overvoltage input threshold (%v fb ) g m , transconductance ( mho) , excess phase (degrees)
mc34262, mc33262 http://onsemi.com 5 -55 t a , ambient temperature ( c) -25 0 25 50 75 100 125 v cc = 12 v figure 8. quickstart charge current versus temperature figure 9. restart timer delay versus temperature t a , ambient temperature ( c) -55 -25 0 25 50 75 100 125 current voltage 900 800 700 600 500 v cc = 12 v 800 700 600 500 400 1.80 1.76 1.72 1.68 1.64 figure 10. zero current detector input threshold voltage versus temperature figure 11. output s aturation voltage versus load current 0 80 160 240 32 0 i o , output load current (ma) -55 t a , ambient temperature ( c) -25 0 25 50 75 100 125 v cc = 12 v v cc gnd 0 -2.0 -4.0 -6.0 2.0 0 4.0 1.7 1.5 1.3 1.6 1.4 upper threshold (v in , increasing) lower threshold (v in , decreasing) source saturation (load to ground) sink saturation (load to v cc ) v cc = 12 v 80 s pulsed load 120 hz rate v cc = 12 v c l = 1.0 nf t a = 25 c v cc = 12 v c l = 15 pf t a = 25 c 5.0 v/div 100 ma/div 100 ns/div 100 ns/div i cc , supply current v o , output voltage figure 12. drive output w aveform figure 13. drive output cross conduction 90% 10% v chg , quickstart charge voltage (v) i chg , quickstart charge current ( a) t dly , restart time delay ( s) v sat , output saturation voltage (v) v th , threshold voltage (v)
mc34262, mc33262 http://onsemi.com 6 i cc , supply current (ma) 0 10203040 v cc , supply voltage (v) v fb = 0 v current sense = 0 v multiplier = 0 v c l = 1.0 nf f = 50 khz t a = 25 c -55 -25 0 25 50 75 100 125 t a , ambient temperature ( c) v cc , supply voltage (v) figure 14. supply current versus supply voltage figure 15. undervoltage lockout thresholds versus temperature startup threshold (v cc increasing) 16 12 8.0 4.0 0 14 13 12 11 9.0 7.0 8.0 10 minimum operating threshold (v cc decreasing) functional description introduction with the goal of exceeding the requirements of legislation on line ? current harmonic content, there is an ever increasing demand for an economical method of obtaining a unity power factor. this data sheet describes a monolithic control ic that was specifically designed for power factor control with minimal external components. it offers the designer a simple, cost ? effective solution to obtain the benefits of active power factor correction. most electronic ballasts and switching power supplies use a bridge rectifier and a bulk storage capacitor to derive raw dc voltage from the utility ac line, figure 16. figure 16. uncorrected power factor circuit ac line rectifiers converter bulk storage capacitor + load this simple rectifying circuit draws power from the line when the instantaneous ac voltage exceeds the capacitor voltage. this occurs near the line voltage peak and results in a high charge current spike, figure 17. since power is only taken near the line voltage peaks, the resulting spikes of current are extremely nonsinusoidal with a high content of harmonics. this results in a poor power factor condition where the apparent input power is much higher than the real power. power factor ratios of 0.5 to 0.7 are common. power factor correction can be achieved with the use of either a passive or an active input circuit. passive circuits usually contain a combination of large capacitors, inductors, and rectifiers that operate at the ac line frequency. active circuits incorporate some form of a high frequency switching converter for the power processing, with the boost converter being the most popular topology, figure 18. since active input circuits operate at a frequency much higher than that of the ac line, they are smaller, lighter in weight, and more efficient than a passive circuit that yields similar results. with proper control of the preconverter, almost any complex load can be made to appear resistive to the ac line, thus significantly reducing the harmonic current content. figure 17. uncorrected power factor input waveforms v pk rectified 0 ac line voltage 0 ac line current line sag dc the mc34262, mc33262 are high performance, critical conduction, current ? mode power factor controllers specifically designed for use in off ? line active preconverters. these devices provide the necessary features required to significantly enhance poor power factor loads by keeping the ac line current sinusoidal and in phase with the line voltage.
mc34262, mc33262 http://onsemi.com 7 operating description the mc34262, mc33262 contain many of the building blocks and protection features that are employed in modern high performance current mode power supply controllers. there are, however, two areas where there is a major difference when compared to popular devices such as the uc3842 series. referring to the block diagrams in figures 20, 21, and 22 note that a multiplier has been added to the current sense loop and that this device does not contain an oscillator. the reasons for these differences will become apparent in the following discussion. a description of each of the functional blocks is given below. figure 18. active power factor correction preconverter rectifiers pfc preconverter high frequency bypass capacitor + converter bulk storage capacitor + load mc34362 ac line error amplifier an error amplifier with access to the inverting input and output is provided. the amplifier is a transconductance type, meaning that it has high output impedance with controlled voltage ? to ? current gain. the amplifier features a typical gm of 100 mhos (figure 6). the noninverting input is internally biased at 2.5 v 2.0% and is not pinned out. the output voltage of the power factor converter is typically divided down and monitored by the inverting input. the maximum input bias current is ? 0.5 a, which can cause an output voltage error that is equal to the product of the input bias current and the value of the upper divider resistor r 2 . the error amp output is internally connected to the multiplier and is pinned out (pin 2) for external loop compensation. typically, the bandwidth is set below 20 hz, so that the amplifier?s output voltage is relatively constant over a given ac line cycle. in ef fect, the error amp monitors the average output voltage of the converter over several line cycles. the error amp output stage was designed to have a relatively constant transconductance over temperature. this allows the designer to define the compensated bandwidth over the intended operating temperature range. the output stage can sink and source 10 a of current and is capable of swinging from 1.7 v to 6.4 v, assuring that the multiplier can be driven over its entire dynamic range. a key feature to using a transconductance type amplifier, is that the input is allowed to move independently with respect to the output, since the compensation capacitor is connected to ground. this allows dual usage of of the voltage feedback input pin by the error amplifier and by the overvoltage comparator. overvoltage comparator an overvoltage comparator is incorporated to eliminate the possibility of runaway output voltage. this condition can occur during initial startup, sudden load removal, or during output arcing and is the result of the low bandwidth that must be used in the error amplifier control loop. the overvoltage comparator monitors the peak output voltage of the converter, and when exceeded, immediately terminates mosfet switching. the comparator threshold is internally set to 1.08 v ref . in order to prevent false tripping during normal operation, the value of the output filter capacitor c 3 must be large enough to keep the peak ? to ? peak ripple less than 16% of the average dc output. the overvoltage comparator input to drive output turn ? off propagation delay is typically 400 ns. a comparison of startup overshoot without and with the overvoltage comparator circuit is shown in figure 24. multiplier a single quadrant, two input multiplier is the critical element that enables this device to control power factor. the ac full wave rectified haversines are monitored at pin 3 with respect to ground while the error amp output at pin 2 is monitored with respect to the voltage feedback input threshold. the multiplier is designed to have an extremely linear transfer curve over a wide dynamic range, 0 v to 3.2 v for pin 3, and 2.0 v to 3.75 v for pin 2, figures 2 and 3. the multiplier output controls the current sense comparator threshold as the ac voltage traverses sinusoidally from zero to peak line, figure 18. this has the effect of forcing the mosfet on ? time to track the input line voltage, resulting in a fixed drive output on ? time, thus making the preconverter load appear to be resistive to the ac line. an approximation of the current sense comparator threshold can be calculated from the following equation. this equation is accurate only under the given test condition stated in the electrical table. v cs , pin 4 threshold 0.65 (v pin 2 ? v th(m) ) v pin 3
mc34262, mc33262 http://onsemi.com 8 a significant reduction in line current distortion can be attained by forcing the preconverter to switch as the ac line voltage crosses through zero. the forced switching is achieved by adding a controlled amount of offset to the multiplier and current sense comparator circuits. the equation shown below accounts for the built ? in offsets and is accurate to within ten percent. let v th(m) = 1.991 v v cs , pin 4 threshold = 0.544 (v pin 2 ? v th(m) ) v pin 3 + 0.0417 (v pin 2 ? v th(m) ) zero current detector the mc34262 operates as a critical conduction current mode controller, whereby output switch conduction is initiated by the zero current detector and terminated when the peak inductor current reaches the threshold level established by the multiplier output. the zero current detector initiates the next on ? time by setting the rs latch at the instant the inductor current reaches zero. this critical conduction mode of operation has two significant benefits. first, since the mosfet cannot turn ? on until the inductor current reaches zero, the output rectifier reverse recovery time becomes less critical, allowing the use of an inexpensive rectifier. second, since there are no deadtime gaps between cycles, the ac line current is continuous, thus limiting the peak switch to twice the average input current. the zero current detector indirectly senses the inductor current by monitoring when the auxiliary winding voltage falls below 1.4 v. to prevent false tripping, 200 mv of hysteresis is provided. figure 10 shows that the thresholds are well ? defined over temperature. the zero current detector input is internally protected by two clamps. the upper 6.7 v clamp prevents input overvoltage breakdown while the lower 0.7 v clamp prevents substrate injection. current limit protection of the lower clamp transistor is provided in the event that the input pin is accidentally shorted to ground. the zero current detector input to drive output turn ? on propagation delay is typically 320 ns. figure 19. inductor current and mosfet gate voltage waveforms inductor current average mosfet q1 on off 0 peak current sense comparator and rs latch the current sense comparator rs latch configuration used ensures that only a single pulse appears at the drive output during a given cycle. the inductor current is converted to a voltage by inserting a ground ? referenced sense resistor r 7 in series with the source of output switch q1. this voltage is monitored by the current sense input and compared to a level derived from the multiplier output. the peak inductor current under normal operating conditions is controlled by the threshold voltage of pin 4 where: pin 4 threshold r 7 i l(pk ) = abnormal operating conditions occur during preconverter startup at extremely high line or if output voltage sensing is lost. under these conditions, the multiplier output and current sense threshold will be internally clamped to 1.5 v. therefore, the maximum peak switch current is limited to: 1.5 v r 7 i pk(max) = an internal rc filter has been included to attenuate any high frequency noise that may be present on the current waveform. this filter helps reduce the ac line current distortion especially near the zero crossings. with the component values shown in figure 21, the current sense comparator threshold, at the peak of the haversine varies from 1.1 v at 90 vac to 100 mv at 268 vac. the current sense input to drive output turn ? off propagation delay is typically less than 200 ns. timer a watchdog timer function was added to the ic to eliminate the need for an external oscillator when used in stand ? alone applications. the timer provides a means to automatically start or restart the preconverter if the drive output has been off for more than 620 s after the inductor current reaches zero. the restart time delay versus temperature is shown in figure 9. undervoltage lockout and quickstart an undervoltage lockout comparator has been incorporated to guarantee that the ic is fully functional before enabling the output stage. the positive power supply terminal (v cc ) is monitored by the uvlo comparator with the upper threshold set at 13 v and the lower threshold at 8.0 v. in the stand ? by mode, with v cc at 7.0 v, the required supply current is less than 0.4 ma. this large hysteresis and low startup current allow the implementation of efficient bootstrap startup techniques, making these devices ideally suited for wide input range off ? line preconverter applications. an internal 36 v clamp has been added from v cc to ground to protect the ic and capacitor c 4 from an overvoltage condition. this feature is desirable if external circuitry is used to delay the startup of the preconverter. the supply current, startup, and operating voltage characteristics are shown in figures 14 and 15.
mc34262, mc33262 http://onsemi.com 9 a quickstart circuit has been incorporated to optimize converter startup. during initial startup, compensation capacitor c 1 will be discharged, holding the error amp output below the multiplier threshold. this will prevent drive output switching and delay bootstrapping of capacitor c 4 by diode d 6 . if pin 2 does not reach the multiplier threshold before c 4 discharges below the lower uvlo threshold, the converter will ?hiccup? and experience a significant startup delay. the quickstart circuit is designed to precharge c 1 to 1.7 v, figure 8. this level is slightly below the pin 2 multiplier threshold, allowing immediate drive output switching and bootstrap operation when c 4 crosses the upper uvlo threshold. drive output the mc34262/mc33262 contain a single totem ? pole output stage specifically designed for direct drive of power mosfets. the drive output is capable of up to 500 ma peak current with a typical rise and fall time of 50 ns with a 1.0 nf load. additional internal circuitry has been added to keep the drive output in a sinking mode whenever the undervoltage lockout is active. this characteristic eliminates the need for an external gate pulldown resistor. the totem ? pole output has been optimized to minimize cross ? conduction current during high speed operation. the addition of two 10 resistors, one in series with the source output transistor and one in series with the sink output transistor, helps to reduce the cross ? conduction current and radiated noise by limiting the output rise and fall time. a 16 v clamp has been incorporated into the output stage to limit the high state v oh . this prevents rupture of the mosfet gate when v cc exceeds 20 v. applications information the application circuits shown in figures 20, 21 and 22 reveal that few external components are required for a complete power factor preconverter. each circuit is a peak detecting current ? mode boost converter that operates in critical conduction mode with a fixed on ? time and variable off ? time. a major benefit of critical conduction operation is that the current loop is inherently stable, thus eliminating the need for ramp compensation. the application in figure 20 operates over an input voltage range of 90 vac to 138 vac and provides an output power of 80 w (230 v at 350 ma) with an associated power factor of approximately 0.998 at nominal line. figures 21 and 22 are universal input preconverter examples that operate over a continuous input voltage range of 90 vac to 268 vac. figure 21 provides an output power of 175 w (400 v at 440 ma) while figure 22 provides 450 w (400 v at 1.125 a). both circuits have an observed worst ? case power factor of approximately 0.989. the input current and voltage waveforms of figure 21 are shown in figure 23 with operation at 115 vac and 230 vac. the data for each of the applications was generated with the test set ? up shown in figure 25.
mc34262, mc33262 http://onsemi.com 10 table 1. design equations notes calculation formula calculate the maximum required output power. required converter output power p o = v o i o calculated at the minimum required ac line voltage for output regulation. let the ef ficiency = 0.92 for low line operation. peak inductor current i l(pk) = 22 p o vac (ll) let the switching cycle t = 40 s for universal input (85 to 265 vac) operation and 20 s for fixed input (92 to 138 vac, or 184 to 276 vac) operation. inductance l p = t 2 2 v o p o v o ? vac (ll) vac (ll) 2 in theory the on ? time t on is constant. in practice t on tends to increase at the ac line zero crossings due to the charge on capacitor c 5 . let vac = vac (ll) for initial t on and t off calculations. switch on ? time vac 2 t on = 2 p o l p the off ? time t off is greatest at the peak of the ac line voltage and approaches zero at the ac line zero crossings. theta ( ) represents the angle of the ac line voltage. switch off ? time v o ? 1 t off = 2 vac ? sin ? t on the minimum switching frequency occurs at the peak of the ac line voltage. as the ac line voltage traverses from peak to zero, t off approaches zero producing an increase in switching frequency. switching frequency f = t on + t off 1 set the current sense threshold v cs to 1.0 v for universal input (85 vac to 265 vac) operation and to 0.5 v for fixed input (92 vac to 138 vac, or 184 vac to 276 vac) operation. note that v cs must be <1.4 v. peak switch current r 7 = i l(pk) v cs set the multiplier input voltage v m to 3.0 v at high line. empirically adjust v m for the lowest distortion over the ac line voltage range while guaranteeing startup at minimum line. multiplier input v oltage + 1 vac v m = r 5 2 r 3 the i ib r 1 error term can be minimized with a divider current in excess of 50 a. converter output voltage ? i ib r 2 v o = v ref r 2 + 1 r 1 the calculated peak ? to ? peak ripple must be less than 16% of the average dc output voltage to prevent false tripping of the overvoltage comparator. refer to the overvoltage comparator text. esr is the equivalent series resistance of c 3 . converter output peak to peak ripple v oltage 2 2 f ac c 3 + esr 2 v o(pp) = i o 1 the bandwidth is typically set to 20 hz. when operating at high ac line, the value of c 1 may need to be increased. (see figure 26) error amplifier bandwidth bw = gm 2 c 1 the following converter characteristics must be chosen: v o ? desired output voltage i o ? desired output current v o ? converter output peak ? to ? peak ripple voltage vac ? ac rms line voltage vac (ll) ? ac rms low line voltage
mc34262, mc33262 http://onsemi.com 11 0.01 c 2 multiplier 7.5k r 3 11k r 1 3 1 + + 220 c 3 100 c 4 13v/ 8.0v mtp 8n50e q 1 2.2m r 5 figure 20. 80 w power factor controller + + + rfi filter c 5 d 4 d 3 d 2 d 1 6.7v zero current detector v o t uvlo current sense comparator rs latch 1.2v 1.6v/ 1.4v 36v 2.5v reference 16v 10 drive output 10 timer delay 92 to 138 vac 1 22k r 4 100k r 6 1n4934 d 6 1.0m r 2 0.1 r 7 4 7 8 5 6 2 mur130 d 5 r 230v/ 0.35a 0.68 c 1 1.5v error amp overvoltage comparator + 1.08 v ref + v ref quickstart 10 a 10pf 20k power factor controller test data ac line input dc output current harmonic distortion (% i fund ) v rms p in pf i fund thd 2357v o(pp) v o i o p o (%) 90 85.9 0.999 0.93 2.6 0.08 1.6 0.84 0.95 4.0 230.7 0.350 80.8 94.0 100 85.3 0.999 0.85 2.3 0.13 1.0 1.2 0.73 4.0 230.7 0.350 80.8 94.7 110 85.1 0.998 0.77 2.2 0.10 0.58 1.5 0.59 4.0 230.7 0.350 80.8 94.9 120 84.7 0.998 0.71 3.0 0.09 0.73 1.9 0.58 4.1 230.7 0.350 80.8 95.3 130 84.4 0.997 0.65 3.9 0.12 1.7 2.2 0.61 4.1 230.7 0.350 80.8 95.7 138 84.1 0.996 0.62 4.6 0.16 2.4 2.3 0.60 4.1 230.7 0.350 80.8 96.0 = coilcraft n2881 ? a primary: 62 turns of # 22 awg secondary: 5 turns of # 22 awg core: coilcraft pt2510, ee 25 gap: 0.072 total for a primary inductance (l p ) of 320 h = aavid engineering inc. 590302b03600, or 593002b03400 t heatsink this data was taken with the test set ? up shown in figure 25.
mc34262, mc33262 http://onsemi.com 12 2 0.68 c 1 1.5v error amp overvoltage comparator + 1.08 v ref + quickstart 10 a 10pf 20k + + 1.6v/ 1.4v timer r 330 c 3 100 c 4 13v/ 8.0v mtp 14n50e q 1 1.3m r 5 figure 21. 175 w universal input power factor controller + + + rfi filter c 5 d 4 d 3 d 2 d 1 0.01 c 2 6.7v zero current detector v o t uvlo current sense comparator rs latch 1.2v 36v 2.5v reference 16v 10 drive output 10 multiplier delay 90 to 268 vac 1 12k r 3 22k r 4 100k r 6 1n4934 d 6 10k r 1 1.6m r 2 0.1 r 7 4 7 8 5 3 1 mur460 d 5 400v/ 0.44a 6 v ref power factor controller test data ac line input dc output current harmonic distortion (% i fund ) v rms p in pf i fund thd 2357v o(pp) v o i o p o (%) 90 193.3 0.991 2.15 2.8 0.18 2.6 0.55 1.0 3.3 402.1 0.44 176.9 91.5 120 190.1 0.998 1.59 1.6 0.10 1.4 0.23 0.72 3.3 402.1 0.44 176.9 93.1 138 188.2 0.999 1.36 1.2 0.12 1.3 0.65 0.80 3.3 402.1 0.44 176.9 94.0 180 184.9 0.998 1.03 2.0 0.10 0.49 1.2 0.82 3.4 402.1 0.44 176.9 95.7 240 182.0 0.993 0.76 4.4 0.09 1.6 2.3 0.51 3.4 402.1 0.44 176.9 97.2 268 180.9 0.989 0.69 5.9 0.10 2.3 2.9 0.46 3.4 402.1 0.44 176.9 97.8 = coilcraft n2880 ? a primary: 78 turns of # 16 awg secondary: 6 turns of # 18 awg core: coilcraft pt4215, ee 42 ? 15 gap: 0.104 total for a primary inductance (l p ) of 870 h = aavid engineering inc. 590302b03600 t heatsink this data was taken with the test set ? up shown in figure 25.
mc34262, mc33262 http://onsemi.com 13 2 0.68 c 1 1.5v error amp overvoltage comparator + 1.08 v ref + quickstart 10 a 10pf 20k + + 1.6v/ 1.4v timer r 330 c 3 100 c 4 13v/ 8.0v mtw 20n50e q 1 1.3m r 5 figure 22. 450 w universal input power factor controller + + + rfi filter c 5 d 4 d 3 d 2 d 1 0.01 c 2 6.7v zero current detector v o t uvlo current sense comparator rs latch 1.2v 36v 2.5v reference 16v 10 drive output 10 multiplier delay 90 to 268 vac 2 12k r 3 22k r 4 100k r 6 1n4934 d 6 10k r 1 1.6m r 2 0.05 r 7 4 7 8 5 3 1 mur460 d 5 400v/ 1.125a 6 0.001 330 v ref power factor controller test data ac line input dc output current harmonic distortion (% i fund ) v rms p in pf i fund thd 2357v o(pp) v o i o p o (%) 90 489.5 0.990 5.53 2.2 0.10 1.5 0.25 0.83 8.8 395.5 1.14 450.9 92.1 120 475.1 0.998 3.94 2.5 0.12 0.29 0.62 0.52 8.8 395.5 1.14 450.9 94.9 138 470.6 0.998 3.38 2.1 0.06 0.70 1.1 0.41 8.8 395.5 1.14 450.9 95.8 180 463.4 0.998 2.57 4.1 0.21 2.0 1.6 0.71 8.9 395.5 1.14 450.9 97.3 240 460.1 0.996 1.91 4.8 0.14 4.3 2.2 0.63 8.9 395.5 1.14 450.9 98.0 268 459.1 0.995 1.72 5.8 0.10 5.0 2.5 0.61 8.9 395.5 1.14 450.9 98.2 = coilcraft p3657 ? a primary: 38 turns litz wire, 1300 strands of #48 awg, kerrigan ? lewis, chicago, il secondary: 3 turns of # 20 awg core: coilcraft pt4220, ee 42 ? 20 gap: 0.180 total for a primary inductance (l p ) of 190 h = aavid engineering inc. 604953b04000 extrusion t heatsink this data was taken with the test set ? up shown in figure 25.
mc34262, mc33262 http://onsemi.com 14 figure 23. power factor corrected input waveforms (figure 21 circuit) figure 24. output voltage startup overshoot (figure 21 circuit) input = 115 vac, output = 175 w input = 230 vac, output = 175 w 2.0 ms/div 2.0 ms/div voltage = 100 v/div current = 1.0 a/div voltage = 100 v/div current = 1.0 a/div without overvoltage comparator 200 ms/div 200 ms/div 500 v 400 v 0 v 432 v 400 v 0 v 80 v/div 80 v/div 26% 8% with overvoltage comparator figure 25. power factor test set ? up 0.005 1.0 0.005 harm freq 11 lo 0.1 o i t 0 to 270 vac output to power factor controller circuit earth line neutral 115 vac input rfi test filter autoformer 2x step-up isolation transformer lo hi hi v a ainst acf vcf arms vrms pf va w 13 9 7 5 3 2 1 0 voltech ac power analyzer pm 1000 an rfi filter is required for best performance when connecting the preconverter directly to the ac line. the filter attenuates the level of high frequency switching that appears on the ac line current waveform. figures 20 and 21 work well with commercially available two stage filters such as the delta electronics 03dpcg5. shown above is a single stage test filter that can easily be constructed with four ac line rated capacitors and a common ? mode transformer. coilcraft cmt3 ? 28 ? 2 was used to test figures 20 and 21. it has a minimum inductance of 28 mh and a maximum current rating of 2.0 a. coilcraft cmt4 ? 17 ? 9 was used to test figure 22. it has a minimum inductance of 17 mh and a maximum current rating of 9.0 a. circuit conversion efficiency (%) was calculated without the power loss of the rfi filter.
mc34262, mc33262 http://onsemi.com 15 figure 26. error amp compensation 2 c 1 error amp + 10 a r 1 1 6 r 2 the error amp output is a high impedance node and is susceptible to noise pickup. to minimize pickup, compensation capacitor c 1 must be connected as close to pin 2 as possible with a short, heavy ground returning directly to pin 6. when operating at high ac line, the voltage at pin 2 may approach the lower threshold of the multiplier, 2.0 v. if there is excessive ripple on pin 2, the multiplier will be driven into cut ? off causing circuit instability, high distortion and poor power factor. this problem can be eliminated by increasing the value of c 1 . figure 27. current waveform spike suppression 10pf 22k current sense comparator r 7 4 7 c r a narrow turn ? on spike is usually present on the leading edge of the current waveform and can cause circuit instability. the mc34262 provides an internal rc filter with a time constant of 220 ns. an additional external rc filter may be required in universal input applications that are above 200 w. it is suggested that the external filter be placed directly at the current sense input and have a time constant that approximates the spike duration. figure 28. negative current waveform spike suppression 10pf 22k current sense comparator r 7 4 7 d 1 a negative turn ? off spike can be observed on the trailing edge of the current waveform. this spike is due to the parasitic inductance of resistor r 7 , and if it is excessive, it can cause circuit instability. the addition of schottky diode d 1 can effectively clamp the negative spike. the addition of the external rc filter shown in figure 27 may provide sufficient spike attenuation.
mc34262, mc33262 http://onsemi.com 16 (top view) figure 29. printed circuit board and component layout (circuits of figures 20 and 21) 4.5 3.0 (bottom v iew) note: use 2 oz. copper laminate for optimum circuit performance.
mc34262, mc33262 http://onsemi.com 17 device ordering information device operating t emperature range package shipping ? mc34262dg t a = 0 c to +85 c soic ? 8 (pb ? free) 98 units / rail mc34262dr2g soic ? 8 (pb ? free) 2500 / tape & reel mc34262pg pdip ? 8 (pb ? free) 50 units / rail mc33262dg t a = ? 40 c to +105 c soic ? 8 (pb ? free) 98 units / rail mc33262dr2g soic ? 8 (pb ? free) 2500 / tape & reel mc33262pg pdip ? 8 (pb ? free) 50 units / rail mc33262cdr2g soic ? 8 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d.
mc34262, mc33262 http://onsemi.com 18 package dimensions pdip ? 8 p suffix case 626 ? 05 issue n 14 5 8 b2 note 8 d b l a1 a eb e a top view c seating plane 0.010 ca side view end view end view with leads constrained dim min max inches a ???? 0.210 a1 0.015 ???? b 0.014 0.022 c 0.008 0.014 d 0.355 0.400 d1 0.005 ???? e 0.100 bsc e 0.300 0.325 m ???? 10 ??? 5.33 0.38 ??? 0.35 0.56 0.20 0.36 9.02 10.16 0.13 ??? 2.54 bsc 7.62 8.26 ??? 10 min max millimeters notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. dimensions a, a1 and l are measured with the pack- age seated in jedec seating plane gauge gs ? 3. 4. dimensions d, d1 and e1 do not include mold flash or protrusions. mold flash or protrusions are not to exceed 0.10 inch. 5. dimension e is measured at a point 0.015 below datum plane h with the leads constrained perpendicular to datum c. 6. dimension e3 is measured at the lead tips with the leads unconstrained. 7. datum plane h is coincident with the bottom of the leads, where the leads exit the body. 8. package contour is optional (rounded or square corners). e1 0.240 0.280 6.10 7.11 b2 eb ???? 0.430 ??? 10.92 0.060 typ 1.52 typ e1 m 8x c d1 b a2 0.115 0.195 2.92 4.95 l 0.115 0.150 2.92 3.81 h note 5 e e/2 a2 note 3 m b m note 6 m
mc34262, mc33262 http://onsemi.com 19 package dimensions soic ? 8 d suffix case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a s ituation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc34262/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca sales representative

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